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Sarvey Selected for IEEE Best Paper Award

Tom Sarvey has been named the recipient of the 2017 Best Paper Award for the IEEE Transactions on Components, Packaging, and Manufacturing Technology in the Components: Characterization and Modeling category. He is a Ph.D. student in the Georgia Tech School of Electrical and Computer Engineering (ECE) and is a member of the Integrated 3D System (I3DS) Group.

Sarvey will be recognized for the paper entitled "Monolithic Integration of a Micropin-Fin Heat Sink in a 28-nm FPGA” at the 2018 IEEE Electronic Components and Technology Conference. The conference will be held May 29-June 1 in San Diego, California.       

This marks the second time that a member of the I3DS Group has won this particular Best Paper Award. Sarvey’s coauthors on the paper are Yang Zhang, an alumnus of the group; ECE Professor Muhannad S. Bakir, who leads the I3DS Group; and Colman Cheung, Ravi Gutala, Arifur Rahman, and Aravind Dasu, all of Intel Corporation’s Programmable Solutions Group. 

For more than a decade, the challenge of removing the heat from high end computing platforms has been a primary limiter of processor power and computing performance. The use of micro-scale fluidic channels has previously been proposed as a method of extracting the large amounts of heat produced by modern processors. 

In this work, such a liquid-cooled heat sink was etched into the backside of a field programmable gate array (FPGA) die, approximately 500 μm from the heat generating circuitry. The heat sink, only 240 μm tall, provided a thermal resistance that is approximately one quarter of that of the best air-cooled heat sinks, in less than 1/1000th of the volume. This type of cooling has the potential to unlock higher computing throughput, lower energy usage, and denser integration in datacenters and high performance computing applications.